This invention relates to a differential amplifier circuit, and more particularly to a differential signal amplifying circuit which is utilized as a sense amplifier for a memory circuit.
Recently, MOS one transistor memory cells have been used widely as this type of memory cell has a minimum number of active elements, thus allowing the construction of small memory cells.
As shown in FIG. 1, this type of memory cell consists of a storage capacitor Co and a transistor Qo having a gate electrode, a source electrode and a drain electrode. The gate electrode is electrically connected to a row select line 10, the source electrode is electrically connected to a column-select line 20 and the drain electrode is electrically connected to the capacitor Co.
In a one transistor memory cell, information read-out is dependent on that charge or lack of charge stored in capacitor Qo. Due to the fact that the charge stored in capacitor Qo is very small it is extremely difficult to detect the information stored in the memory cell. Therefore, a MOS differential signal amplifier is commonly used as a sense amplifier for detecting the stored information. Such a differential signal amplifier is essentially constructed from a balanced flip-flop circuit wherein the same electrical potential is initially impressed on both input terminals of the flip-flop circuit and thereafter the information to be read out from the memory cell is impressed on one of the input terminals. The potential of the read out information impressed on the one of the input terminals, causes an imbalance in the flip-flop which tips the flip-flop in a predictable direction to produce an output signal.
Therefore what occurs is that the differential input signal is amplified due to the amplifying function of the flip-flop circuit to produce a complementary output at the two input/output terminals. In such a differential amplifier, a relatively high voltage is necessarily impressed on the gate electrode of one of the MOS transistors included in the flip-flop subsequent to the amplifying operation. The result is that an electric field is applied to the gate insulating film of the MOS transistor for a considerable period of time causing a polarization of a phosphorous glass layer placed on the gate insulating film and/or causing a drift of cations in the gate insulating film which changes the value of the threshold voltage of the MOS transistor. This change in the threshold voltage is undesirable for any amplifier and especially for a differential amplifier utilized to amplify the above-described small input signals because it lowers the reliability and sensitivity of the amplifier. These types of prior art devices are disclosed in "Electronics" magazine, dated Sept. 13, 1973, on pages 113 to 121.
With reference to FIGS. 2 and 3, the differential type sense amplifier circuit according to the prior art will be described. As shown in FIG. 2, n channel field effect transistors Q.sub.1, Q.sub.2, Q.sub.3 and Q.sub.4 comprise a flip-flop circuit, in which transistors Q.sub.1 and Q.sub.2 are provided with a constant voltage V.sub.DD at their drain electrodes and are used as load transistors in accordance with clock signal SE. Similarly transistors Q.sub.3 and Q.sub.4 are used as amplifying transistors.
N channel field effect transistors Q.sub.5, Q.sub.7 and Q.sub.8 are used to charge input terminals 1 and 2, and to charge node 3 of the flip-flop circuit with a constant voltage source V.sub.M by controlling the potential of the gate electrodes of transitions Q.sub.5, Q.sub.7 and Q.sub.8 with signal P before clock signal SE is impressed on the gate electrode of n channel field effect transistor Q.sub.6. Transistor Q.sub.6 controls an operation of the flip-flop circuit as will be described hereinafter. N channel field effect transistor Q.sub.9 inserted between input terminals 1 and 2 is used to equalize the potential between terminals 1 and 2 in accordance with the signal P.
Refer to FIG. 3 wherein it is illustrated that in the operation of this amplifier, the signal P is maintained at a high level till time T.sub.1 thereby allowing terminals 1 and 2 and node 3 to be charged. Thereafter chip-enable signal CE goes high and is impressed on a relevant memory cell (not shown) for activation thereof and information read from the memory cell is impressed on the terminals 1 and 2 as a differential signal input. At time T.sub.2, the clock signal SE goes high and is impressed on the gate electrodes of the transistors Q.sub.1, Q.sub.2 and Q.sub.6 to activate the flip-flop circuit for amplifying the differential signal input. Thus, the amplified output of the read-out information can be detected at the terminals 1 and 2. Finally, at time T.sub.3, the levels of the chip-enable signal CE and clock signal SE change to a low level and the level of the signal P again becomes high to complete the sensing operation.
However, after the amplified output is developed, a relatively high voltage is still impressed on the gate electrode of one of the transistors Q.sub.3 and Q.sub.4 during the relatively long period of time between T.sub.2 and T.sub.3, which is the period that the clock signal SE is at a high level. This causes a polarization of a phosphorous glass layer in the gate oxide film included in the transistor which results in a change in the threshold voltage of the transistor. Thus the sensitivity and reliability of this amplifier is adversely affected.
It is therefore an object of this invention to prevent changes in the threshold voltage of a differential signal amplifier.
It is another object of this invention to increase the sensitivity of a differential signal amplifier.
It is a further object of this invention to provide a sensitive sense amplifier for a memory circuit which is resistant to changes in threshold voltage.